There are known in general a NAND type and a NOR type as a memory cell system of the ROM circuit. The NOR type is more effective than the NAND type in respect of high-speed reading but is larger than the latter in respect of the occupying area of the memory cell.
There is currently proposed a virtually grounded type memory array (Virtual GND Memory Array) system which is an improved NOR type.
However, in the ROM of the prior art Virtual GND Memory Array system, an inner voltage regulator circuit needs to be operating even in a standby state, which results in consumption of much power.
Such a ROM circuit is disclosed in e.g. Japanese Patent Laid-Open Publication No. 1-259556 as published in Oct. 17, 1989 and No. 4-74395 as published in Mar. 9, 1992.
It is an object of the invention to provide a method of reading data at high speed with low power consumption and a ROM circuit capable of reading data at high speed with low power consumption.